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日期:2021-07-06 08:00

EE 310 Electronic Circuit Design I

Experiment 8
Op Amp Design Project
Rocket Probe Signal Conditioning and Interfacing Circuits
(It doesn't take a rocket scientist to design these circuits!)
Note: The entirety of this lab is to be competed in Multisim.

Introduction

Op amps are important for such linear circuit applications as analog signal conditioning and interfacing.
In a first iteration at designing linear circuits, we often consider the op amp to behave as an ideal device.
With the needed circuit functions envisioned, the process becomes that of designing the various stages to
satisfy the specified problem. A particularly nice feature about op amps is that we can cascade stages,
each having a relatively large input impedance and small output impedance, and as a result they are
essentially non-interacting. Care has to be exercised in selecting external component values (e.g., resistors
and capacitors) to ensure that their current requirements are not too large for the op amps. Finally, with
our design specifications satisfied, at least in the ideal sense, it usually is necessary to address the
nonideal (practical) characteristics of the op amp and to determine any potential problems that may result.
For this initial design effort, we focus on linear circuit applications assuming that the op amp is an ideal
device, and also on its use as a comparator (a nonlinear circuit). An investigation of the op amp’s practical
device effects as they relate to circuit design will be examined in the next lab exercise.

The particular application to be considered involves the task of measuring the current of charge collected by
a rocket probe, converting the current to a voltage, removing an unwanted common-mode signal (the bias
voltage applied to the probe for charge collection), and finally doing the necessary signal processing
(voltage scaling and shifting) to ensure compatibility with the input to a telemetry system (typically, a PCM
encoder). It also is desirable to know the probe collection voltage's polarity since we expect positive charge
collection to result when the probe has a negative bias voltage, and vice versa. A diagram illustrating these
different functions is shown in the following figure.

Diagram of Probe Signal Conditioning and Interfacing Circuits

υΟ1
υΟ4
RF
Diff
Amp
υ
P
Polarity
Monitor
Signal
Conditioner
PCM
Encoder
I
υID
υP
υΟ2 υΟ3
EE 310 Experiment 8 2
Design Problem/Description

Now, we briefly consider the details. The probe current of collected charge, I, will need to be simulated. We
will consider its magnitude to be ≤ 10 μA. (It can be either polarity.) The first design task, then, is to convert
the current to a voltage (vO1). Because the probe needs to be biased, we expect that this voltage, vP, will be
added to vO1, and hence it will need to be subsequently removed. The nature of vP is as follows: it is a 20-V
p-p triangular waveform having a mean (DC) value equal to zero volts and a frequency of 10 Hz.

Let us now consider the output voltage of the subsequent stage, vO2, which has vP removed. This voltage,
referenced to system ground, can be of either polarity. Last, we need to do signal conditioning such that the
final analog data signal, vO3, is compatible with the PCM encoder's input. Specifically, the PCM encoder's
inputs require analog voltages in the range of 0-5 V and they have an input resistance of at least 1 MΩ.

Finally, as noted previously, we also would like to know the polarity of the probe voltage, vP. This particular
task involves a nonlinear op-amp circuit application, namely, using the device as a comparator. For this
particular voltage polarity monitor, try to determine the polarity change with a threshold margin no greater
than ±10 mV.

Thus, to summarize, the following overall specifications apply to this design effort:

Input current magnitude (| I | ) ≤ 10 μA
Small-signal transresistance gain (ΔvO3/ΔI) = 200 V/mA
No vP contribution at output (i.e., essentially perfect common-mode rejection)
Output voltages (vO3 and vO4) compatible with PCM encoder's input (0-5 V)
Voltage polarity monitor accurate to ±10 mV
Power supply voltages: ±15 V

Assume that the op amps can be approximated as ideal devices. A number of different op amps are
available in Multisim, we will be using the LM324AD op-amp.

Practical Design Considerations

1. While op amps are not expensive, it obviously is important to keep your design as simple as
possible and to keep the number of components minimal.
2. Certain device parameters need to be considered in the selection of the op amps for this design.
This will be apparent later. For now, it suffices to note that some of the more important parameters
are input bias current, input common-mode voltage range, common-mode rejection ratio, small-
signal bandwidth, and input offset voltage. Since care must be taken to not load down the op amp's
output, calculate the output current for each op amp and choose external components so that this
value preferably does not exceed 2.5 mA.

3. Power supply bypass capacitors should be applied to all op amps. A word on their use is provided
in Appendix A.
EE 310 Experiment 8 3
Reporting Requirements

1. Design Proposal:

A modest design proposal is expected for the linear Signal Conditioning/Interface Circuitry at the
beginning of the first lab session and the Polarity Monitor (nonlinear comparator) Circuitry at the
beginning of the second lab session. Keep it simple, yet informative! Include the following:

Introduction—explain in your own words what is foreseen as the circuitry to satisfy the
problem;

Proposed Circuit Design—present the op-amp circuit diagrams needed to solve the problem,
with an explanation to justify your approach;

Analysis—include supporting calculations; the analysis should at least include expressions for
output voltages and op-amp output currents.

Prepare this proposal either in typed form or using neat handwriting. Hand written circuit
diagrams and calculations are fine.

2. Lab Notebook:

The above information also is important for your notebook. As your lab work progresses, include
a wiring schematic, a list of equipment used, all measurements and figures, etc., so that you have
a record of everything that occurred. Also, your thoughts and impressions are important and
should be entered.

As you do your lab work, you probably will see your proposed design evolve into an improved
version. Include all documentation.

2. Design Report:

Note: Attach a screenshot of your assembled circuit in multisim to your report along with
screenshots of all oscilloscope plots and multimeter readings while uploading to canvas.
Compile everything in a single pdf file if possible.

At the conclusion of the experiment, a separate report of your design effort is requested. Include
the following:

Introduction—present the problem in your own words;

Circuit Design—develop your design approach (with circuit diagrams);

Supporting Analysis—include relevant equations and supporting calculations;

Data—present measurements, graphs, etc., along with documentation;

Discussion—report results and explain their significance; this should include a comparative
evaluation of your developed analytical expressions, and the Multisim measurements.

Summary and Conclusions—describe what was learned, and give your thoughts/observations;

Appendix A—Power Supply Bypass Capacitors


A NOTE ON POWER SUPPLY DECOUPLING CAPACITORS

Electrical schematics containing power supply decoupling (or bypass) capacitors do not seem to
make much sense at first glance, but these components play a vital role in reliable circuit operation.
After all, what good does it do to put a capacitor in parallel with a dc voltage source? And why put a
very small capacitor in parallel with a very large one?

Electronics circuits are commonly located at some distance from the power supplies, and long lines
are typically used to distribute the power from the power supply to the circuits. These lines contain
distributed series resistance and inductance. Currents flowing in the distribution system lead to
voltage drops that cause local variations in the power supply voltage and ground. The inductive
component of the distribution system is particularly troublesome whenever fast current pulses are
present because these transients cause Ldi/dt voltage spikes to occur on the power busses and ground.
Logic circuits commonly draw very fast current spikes from the power distribution system because
they switch rapidly and drive capacitive loads. The local Vcc readily collapses and the ground
"bounces".

The solution to this problem is to add capacitors near the load circuits; these act to provide a local
source of energy for supplying the fast transients. The load current spike is drawn from a nearby
capacitor instead of being pulled completely through the distribution system from the main power
source.

Typically a large tantalum or aluminum capacitor is located on each circuit card near the edge
connector. These capacitors provide a large amount of capacitance in a small package so they can
store a lot of energy. This minimizes the flow of fast transient currents between the card and the
power supply. Unfortunately, these types of capacitors typically have a very poor frequency response
so they cannot handle the fast spikes very well. To circumvent this problem small capacitors (usually
ceramic) are placed near the circuits that are responsible for the fast load current spikes. Typically
there are several of these capacitors on each circuit card. Ceramic capacitors below 0.01 µF have
very good high frequency characteristics, and they are able to act as a local power source for very
fast load current spikes.

Without proper power supply decoupling it is easily possible for logic circuits to generate noise spikes
large enough to erroneously set latches, etc. Analog circuits also need adequate bypassing;
operational amplifiers commonly oscillate because of coupling through the power supply lines.

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